Apogee Semiconductor – TalRad™ Process Design

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Apogee Semiconductor – TalRad™ Process Design

Apogee Semiconductor, a provider of technologies and products for space and other extreme environments, announced today their TalRad™ Process Design Kit is available for evaluation. The Transistor-Adjusted-Layout for Radiation (TalRad™) Process Design Kit (PDK) is a rad-hard process design methodology that improves the radiation performance of commercial process technologies, enabling the rapid creation of rad-hard designs in a fraction of the time and effort.

Apogee Semiconductor and TSI Semiconductors have partnered to implement TalRad™ radiation hardened process design kit in TSI’s 180nm CMOS high-voltage silicon process.

“Our products and services are targeted towards enabling small-satellites and large constellations that require high performance, small form factors and radiation resilience at a lower cost,” stated Anton Quiroz, CEO. “We partnered with TSI Semiconductors to implement TalRad™ to increase the TID (Total Ionizing Dose) performance of the baseline process by up to 10x, with little to no design performance penalties or process integration effort.

The implementation of TalRad™ PDK includes the development of design-rule-checker and layout-vs-schematic rule decks, PCELLs and characterizing the radiation performance and reliability of the new components.”

“It has been exciting to work with TSI Semiconductors to implement a rad-hard process that will make it significantly easier for IC designers to create cutting edge technologies for the space industry. We look forward to a continued partnership with TSI,” continued Quiroz.

“This strategic partnership with Apogee will enable system designers to produce RAD Hard technology across a wide range of products for logic, HV, RF, analog, and mix signal applications.” Now that the Apogee TalRad™ PDK is implemented and silicon qualified in our foundry, this technology can be evaluated using our MPW shuttle program prior to product qualification across a wide range of RAD Hard market segments, said Wilbur Catabay, SVP of TSI Corporate Strategy.”

Benefits of the TalRad™ PDK

  • Up to 10x improvement in TID performance*
  • Little to no design size penalty
  • Minimal process integration effort
  • Standard transistor look and feel
  • The TalRad™ transistor can be over 5 times smaller than their Annular counterparts for the longer channel lengths necessary for precision matching and high gain.
  • The TalRad™ techniques can be implemented in any CMOS or BCD foundry to improve the radiation tolerance of bulk or shallow-trench-isolated silicon processes.
  • Implementing TalRad™ includes the development of design-rule-checker and layout-vs-schematic rule decks, PCELLs and characterizing the radiation performance and reliability of the new components.

*compared to standard PDK components

Contact Apogee Semiconductor if you are interested in an evaluation license for the TalRad™ rad-hard PDK.

 

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